- CPU
- 8-bit turbo 80C52 architecture - 4 cycles/ 1machine cycle - instruction level compatible with Intel 80C52
- 64kB FLASH (Including 1kB User EEPROM)
- 4kB Internal AUX. RAM
- 256B Internal RAM
- Operating Voltage : 2.2V ~ 3.6V
- Operating Frequency : Max. 48MHz
- Max. Programmable 28(32-MLF) Pins
- Push-Pull Control(2 I/O Pins), Open drain, Push-Pull Output - TTL and CMOS compatible logic levels
- Low Voltage Detector (LVD) : +1.6V
- Internal RING OSC with Calibration Function
- 48MHz (±3%) @ VDD = 3V
- 24-channel Touch Sensing (32-MLF)
- Capacitance sensing - Digital sensing - 16bit level resolution
- Supporting ISP / IAP / MDS
- Three 16-bit Timer/Counters
- 2-Channel I2C (Master/Slave)
- 26-bit Programmable Watchdog Timer
- 1-channel UART
- Max. 12-channel 8bit high speed PWM for DIMMING(32-MLF)
- 12 Interrupt Sources
- Timer0/1/2, WDT, I2C 0/1, UART, TS - 4 External Interrupt Source : Both Edge/Level - Two-level interrupt priority
- Reset Sources
- On-chip POR (Power-On-Reset) - External reset - LVD (Low Voltage Detector) Reset - WDT (Watchdog Timer) Reset
- Power Down Wake-up Sources
- Reset Sources + 4 External interrupt (both lvevls) - WDT interrupt
- Power Consumption
- Active Current : Max 1mA @3.3V, 2MHz - Idle Current : Max 0.5mA @3.3V, 2MHz - Stop Current : Max 110uA @3.3V
- E.S.D. Protection Up to
- 8000V for Touch Sensor Channel Pin - 2000V for Normal I/O Pin
- Latch-up Protection Up to ±200mA
- Package
- 32-MLF (5mm X 5mm)
|
| |
|