- CPU
- 8-bit turbo 80C52 architecture - 4 cycles/ 1machine cycle - instruction level compatible with Intel 80C52
- 1kB FLASH (Including 256B User EEPROM)
- 128B Internal RAM
- Operating Voltage : +2.2V to +3.6V
- Operating Frequency
- Max. 12MHz @ 3.3V
- Max. Programmable 4 I/O Pins
- Pull-up Control, Push-Pull Output - TTL & CMOS Compatible Logic Levels
- TTL and CMOS compatible logic levels
- Low Voltage Detector (LVD) : +2.7V
- Internal RING Osc. with Claibration Function
- 12MHz (±3%) @ 3.3V
- 26-bit Programmable Watchdog Timer
- Supporting ISP / IAP / MDS
- One 16-bit Timer/Counters
- 1-Channel I2C
- 5 Interrupt Sources
- Timer0, WDT, LVD, I2C - 1 External Interupt Source : Both Edge / Level - Two-level interrupt priority
- Reset Sources
- On-chip Power-On-Reset (POR) - Low Voltage Detector Reset (LVD) - Watchdog Timer Reset
- Power Down Wake-up Sources
- Reset Sources + 1 External interrupt (Level Detect)
- Power Consumption
- Active Current : Max 1mA @3.3V, 2MHz - Idle Current : Max 6.5mA @3.3V, 2MHz - Stop Current : Max 1uA @3.3V (All clock off)
- E.S.D. Protection up to 2,000V
- Latch-up Protection up to ±200mA
- Package
- 16-MLF (4mm X 4mm)
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